1. Field of the Invention
The present invention relates to a sampling frequency converting apparatus for converting an input digital signal sampled with a predetermined sampling frequency into a digital signal of a sampling frequency which is asynchronous with the above predetermined sampling frequency, and particularly to an apparatus which is capable of preventing a deterioration of a converting accuracy resulting from a change of a ratio between an input sampling frequency and an output sampling frequency.
2. Description of the Related Art
In a digital equipment represented by a digital audio apparatus and a digital video tape apparatus, when transmitting and receiving data between equipments having different sampling frequencies, it is necessary to convert a sampling frequency of data output from a transmitting side equipment into a sampling frequency of a receiving side equipment.
In the sampling frequency converting apparatus as described above, in general, a ratio between an input sampling frequency and an output sampling frequency (input/output sampling frequency ratio) is measured and a frequency conversion processing is performed using this input/output sampling frequency ratio.
FIG. 1 is a diagram showing a schematic system configuration of a sampling frequency converting apparatus. An input/output sampling frequency ratio measuring and generating circuit 1 receives as its inputs an input signal system reference clock (for example, a clock 128 Fsi of a frequency 128 times an input sampling frequency Fsi) supplied from a transmitting side digital equipment through an input terminal Pi1 as well as an output signal system reference clock (a clock of a frequency a predetermined number time an output sampling frequency Fso) supplied from a receiving side digital equipment through an input terminal Pi2.
As is shown in FIG. 2, the input/output sampling frequency ratio measuring and generating circuit 1 includes a Fsi/Fso counter circuit 3 which receives the input signal system reference clock 128 Fsi input from the input terminal Pi1 and a frequency divider 4 which divides the output sampling frequency Fso supplied through the input terminal Pi2 into a predetermined number of parts (by way of an example, 1/4096) and supplies it to the Fsi/Fso counter circuit 3. The Fsi/Fso counter circuit 3 includes a counter 5 for counting the input signal system reference clock 128 Fsi (by way of an example, a free run counter of 19 bits word length) and a latch circuit 6 to which the counter output is input. An output clock 1/4096 Fso from the frequency divider 4 is supplied to the counter 5 as a reset pulse and also to the latch circuit 6 as a strobe pulse. Therefore, a ratio between the input sampling period and the output sampling period is latched in the latch circuit 6 in the form of count value of the input signal system reference clock 128 FSi at every period of the clock 1/4096 Fso (i.e. at every time corresponding to 4096 clock amount of the output sampling frequency Fso).
This count value increases as the input sampling frequency Fsi becomes higher than the output sampling frequency Fso, whereas it decreases as the input sampling frequency Fsi becomes lower than the output sampling frequency Fso. The count value corresponds to a ratio between the two sampling frequencies Fsi and Fso in each period of the clock 1/4096 Fso. Accordingly, by measuring the ratio between the input sampling period and the output sampling period, the input/output sampling frequency ratio can be found.
In order to improve its accuracy by increasing the number of digits of the measured value of the input/output sampling frequency ratio, a measuring period T of the count value of the input signal system reference clock 128 Fsi is set to be the time period for 4096 clock amount of the output sampling frequency Fso rather than the time period for one clock amount thereof.
An output of the latch circuit 6 (the measured value RS of the input/output sampling frequency ratio) is supplied to a sampling frequency converter signal processor 2 of FIG. 1 through an output terminal Po2. The sampling frequency converter signal processor 2 frequency-converts a digital signal of the input sampling frequency Fsi supplied from the transmitting side digital equipment through an input terminal Pi3 using the measured value RS of the input/output sampling frequency ratio, and supplies a digital signal of the output sampling frequency Fso to the receiving side digital equipment through an output terminal Po1.
In this manner, the conventional sampling frequency converting apparatus used to perform the frequency conversion processing using the measured value RS itself of the input/output sampling frequency ratio found by the input/output sampling frequency ratio measuring and generating circuit 1.
Incidentally, when the input sampling frequency Fsi in the transmitting side (or the output sampling frequency Fso in the receiving side) changes in the middle of the conversion processing of the sampling frequency, the measured value RS of the input/output sampling frequency ratio found by the input/output sampling frequency ratio measuring and generating circuit 1 goes to a value which changes rapidly stepwise between the successive measuring periods T of the input/output sampling frequency ratio, for example, as is shown in FIG. 3. In such a case, with the conventional sampling frequency converting apparatus, since the measured value RS of the input/output sampling frequency ratio is utilized as is for performing the frequency conversion processing, a temporal wave distortion is generated on the output digital signal, which may result in the deterioration of the frequency converting accuracy.
It has been attempted that, in such a case, the measured value RS of the input/output sampling frequency ratio is integrated and the integrated value for reducing the change is supplied to the sampling frequency converter signal processor 2. However, while it is required of the sampling frequency converting apparatus to convert the sampling frequency of the input digital signal in real time, since it will take a considerably long period of time to sufficiently reduce the change by the integration, a substantial time delay will be produced until the integrated measured value of the input/output sampling frequency ratio is supplied to the sampling frequency converter signal processor 2 according to the attempted method. Therefore, the attempted method is not suitable for applying to the sampling frequency converting apparatus.